5762.
The design of a delta-sigma modulator with low clock feedthrough noise, op-amp gain compensation, and more correctly transferring charges between capacitors
Chiang, Jen-shiun; Hu, Chih-wei
,
1997-06-09
[電機工程學系暨研究所] 會議論文 Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on, vol.3, pp.2016-2019
the phases of P1 and P2, and tl and
t2 are points of time. At tl,P1 is pulling up and P2 is
pashing down, and that causes switches S11and S32
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