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    Items for Author "Chen, Hsin-Chuan" 

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    Showing 10 items.

    Collection Date Title Authors Bitstream
    [電機工程學系暨研究所] 學位論文 2005 Designs of high-performance and low-power cache architectures 陳信全; Chen, Hsin-chuan
    [電機工程學系暨研究所] 會議論文 2005-03 Low-power way-predicting cache using valid-bit pre-decision for parallel architectures Chen, Hsin-Chuan; Chiang, Jen-Shiun
    [電機工程學系暨研究所] 會議論文 2003-08 A Jitter-Free Phase-Interpolation Direct Digital Synthesizer Using Two-Phase Integration Chen, Hsin-Chuan; Chiang, Jen-Shiun; Chen, Hsing-Ying
    [電機工程學系暨研究所] 會議論文 2002-08 A ROM-Less Direct Digital Synthesizer Using Piecewise Linear Approximation Chen, Hsin-Chuan; Chiang, Jen-Shiun; Kuo, Chung-Yu
    [電機工程學系暨研究所] 會議論文 2001-07 A Fast Sequential MRU Cache with Competitive Hardware Cost Chen, Hsin-Chuan; Chiang, Jen-Shiun; Lin, Yu-Sen
    [電機工程學系暨研究所] 期刊論文 2005-08 A Low-Jitter Phase-Interpolation Direct Digital Synthesizer Using Single Capacitor Integration Chen, Hsin-chuan; 江正雄; Chiang, Jen-shiun
    [電機工程學系暨研究所] 期刊論文 2005-07 Design of an Adjustable-way Cache for Energy Reduction Chen, Hsin-chuan; Chiang, Jen-shiun
    [電機工程學系暨研究所] 期刊論文 2004-09-25 A low-jitter phase-interpolation DDS using dual-slope integration Chen, Hsin-chuan; 江正雄; Chiang, Jen-shiun
    [電機工程學系暨研究所] 期刊論文 2003-09 Design of a Low-Power Configurable-Way Cache Applied in Multiprocessor Systems 江正雄; Chen, Hsin-chuan; Chiang, Jen-shiun
    [電機工程學系暨研究所] 期刊論文 2001-12 High Speed Sequential MRU Caches Chen, Hsin-chuan; Chiang, Jen-shiun; Lin Yu-sen

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