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    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/96041


    Title: A Low-Power CMOS Output Buffer
    Authors: Cheng, Kuo-Hsing;Yang, Wei-Bin
    Contributors: 淡江大學電機工程學系
    Keywords: 電路設計;互補式金屬氧化物半導體;輸出緩衝器;低擺幅靴帶回授控制分路;Circuit Design;Complementary Metal-Oxide Semiconductor;Output Buffer;Low-Swing Bootstrapped Feedback-Controlled Split-Path
    Date: 1999-08
    Issue Date: 2014-02-13 11:38:09 (UTC+8)
    Abstract: A low-power CMOS output buffer, called the low-swing bootstrapped feedback-controlled split-path (LBFS) CMOS buffer is proposed.By using the feedback-controlled split-path method, the short-circuit current of the output inverter stage is eliminated. The dynamic power dissipation of the LBFS CMOS buffer can be reduced by limited the gate voltage swing of the output inverter. Moreover, the propagation delay of the LBFS buffer is also reduced by non-full-swing gate voltage of the output inverter. By HSPICE simulation, the power dissipation and the noise of the LBFS CMOS buffer can be reduced over 20% in comparison to conventional CMOS tapered buffer under various supply voltage, operating frequency and capacitive load.
    Relation: 第十屆超大型積體電路設計暨計算機輔助設計技術研討會技術論文集=Proceedings of the Tenth VLSI Design/CAD Symposium,頁209-212
    Appears in Collections:[Graduate Institute & Department of Electrical Engineering] Proceeding

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