2.4GHz CMOS Power Amplifier with Dynamic Bias Circuits for Efficiency Improvement

淡江大學機構典藏 > 工學院 > 電機工程學系暨研究所 > 會議論文 > Item 987654321/96036

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題名:	2.4GHz CMOS Power Amplifier with Dynamic Bias Circuits for Efficiency Improvement
作者:	Chiang, Jen-Shiun;Chen, Jim-Wen
貢獻者:	淡江大學電機工程學系
關鍵詞:	2.4十億赫茲;功率放大器;動態偏壓電路;效率改善;偏壓控制;2.4 GHz;Power amplifier;Dynamic bias circuit;Effeciencyimprovement;Bias control
日期:	2003-08
上傳時間:	2014-02-13 11:37:33 (UTC+8)
摘要:	This work presents a dynamic gate bias circuit for bias control to maximize power added efficiency based on the class-A two-stage power amplifier. The proposed circuits are composed of two NMOS transistors, a capacitor for coupling RF input signal, four resistors for bias, and a RF choke. The circuit is implemented due to the bias control at the two-stage power amplifier to improve the overall power added efficiency and delivers 23dBm output power at 2.4GHz. The circuit can improve the power efficiency for small RF signals. The simulation indicates that the efficiency is improved more than 100% at 0dBm input signal. This proposed power amplifier can be applied to the transceivers of IEEE 802.11a, 11b, and Bluetooth.
關聯:	第十四屆超大型積體電路設計暨計算機輔設計技術研討會論文摘要集=Proceedings of The 14th VLSI Design/CAD Symposium，頁125-128
顯示於類別:	[電機工程學系暨研究所] 會議論文

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