This work presents a dynamic gate bias circuit for bias control to maximize power added efficiency based on the class-A two-stage power amplifier. The proposed circuits are composed of two NMOS transistors, a capacitor for coupling RF input signal, four resistors for bias, and a RF choke. The circuit is implemented due to the bias control at the two-stage power amplifier to improve the overall power added efficiency and delivers 23dBm output power at 2.4GHz. The circuit can improve the power efficiency for small RF signals. The simulation indicates that the efficiency is improved more than 100% at 0dBm input signal. This proposed power amplifier can be applied to the transceivers of IEEE 802.11a, 11b, and Bluetooth.
Relation:
第十四屆超大型積體電路設計暨計算機輔設計技術研討會論文摘要集=Proceedings of The 14th VLSI Design/CAD Symposium，頁125-128
