English  |  正體中文  |  简体中文  |  Items with full text/Total items : 52343/87441 (60%)
Visitors : 9114341      Online Users : 228
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library & TKU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
  • Adv. Search
    HomeLoginUploadHelpAboutAdminister Goto mobile version
    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/96033

    Title: A Jitter-Free Phase-Interpolation Direct Digital Synthesizer Using Two-Phase Integration
    Authors: Chen, Hsin-Chuan;Chiang, Jen-Shiun;Chen, Hsing-Ying
    Contributors: 淡江大學電機工程學系
    Keywords: 無震盪;相位插入;直接數位合成器;二相位積分;數位類比轉換器;鎖相迴路;Jitter-free;Phase-interpolation;Direct digital synthesizer (DDS);Two-phase integration;Digital analog converter (DAC);Phase lockedloop (PLL)
    Date: 2003-08
    Issue Date: 2014-02-13 11:37:13 (UTC+8)
    Abstract: There exists a phase jitter problem in using the conventional direct digital frequency synthesizer (DDS)as a pulse or clock generator, and most of the existed solving methods employ the phase interpolation to generate a pulse or clock with correct time intervals. In this paper, a new phase-interpolation DDS scheme is proposed, which uses the output of the adder within the phase accumulator to provide an initial voltage on an integration capacitor in the first phase, and then performs integration operation on the integration capacitor in the second phase. Therefore, this DDS can correct the phase error at each overflow of the phase accumulator. Furthermore, no ROM tables and D/A converters are required, the proposed DDS using a two-phase integration not only provides a jitter-free clock output to reduce its spurious level, but also has a low hardware complexity.
    Relation: 第十四屆超大型積體電路設計暨計算機輔設計技術研討會論文摘要集=Proceedings of The 14th VLSI Design/CAD Symposium,頁565-568
    Appears in Collections:[電機工程學系暨研究所] 會議論文

    Files in This Item:

    File SizeFormat
    A Jitter-Free Phase-Interpolation Direct Digital Synthesizer Using Two-Phase Integration_英文摘要.docx15KbMicrosoft Word170View/Open

    All items in 機構典藏 are protected by copyright, with all rights reserved.

    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library & TKU Library IR teams. Copyright ©   - Feedback