This paper describes circuit techniques for fabricating a 1.2V high-speed 32-bit adder using pass-transistor logic and without changing conventional 5V CMOS process. The low- power current-sensing complementary pass-transistor logic(LCSCPTL) is used in this design for its high operating speed and low power dissipation. A carry propagation circuit technique called conditional carry selection ( CCS) is used to resolve the problem of series-connected pass transistors in the carry propagation path. Based upon the HSPICE simulation, the operation speed of the LCSCPTL is about 2.2 times higher than the CPL. The power dissipation of the LCSCPTL is lower 40% than that of the CPL.
Relation:
第八屆超大型積體電路設計暨計算機輔助設計技術研討會論文集(VLSICAD)=Proceedings of the 8th VLSI Design/CAD Symposium,頁349-352