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    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/96025

    Title: The Charge-Transfer Feedback-Controlled Split-Path CMOS Buffer
    Authors: Cheng, Kuo-Hsing;Yang, Wei-Bin;Huang, Hong-Yi
    Contributors: 淡江大學電機工程學系
    Keywords: 電荷轉移;回授控制;分徑;緩衝器;互補式金氧半導體;Charge Transfer;Feedback Control;Split Path;Buffer;Cmos
    Date: 1997-08
    Issue Date: 2014-02-13 11:36:15 (UTC+8)
    Abstract: A new low-power hihg-speed CMOS buffer, called the charge-transfer feedback-controlled split-path (CFS) CMOS buffer is proposed. By using the feedback-controlled split- path method, the short-circuit current of the output inverter is eliminated. Four additional MOS transistors are used as the charge-transfer diodes, which can transfer the charge stored in the split output-stage driver to the output node. Thus the propagation delay and power dissipation of the CFS buffer are reduced. The HSPICE simulation results show that the power-delay product of the CFS CMOS buffer is saving of over 20 % in comparison to conventional CMOS tapper buffer at 100MHz operation frequency.
    Relation: 第八屆超大型積體電路設計暨計算機輔助設計技術研討會論文集(VLSICAD)=Proceedings of the 8th VLSI Design/CAD Symposium,頁353-356
    Appears in Collections:[Graduate Institute & Department of Electrical Engineering] Proceeding

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