在本論文中，我們首先介紹DVB-T系統架構與規格，接著探討Memory base與Pipeline base兩種架構之優缺點。為了設計的方便性，我們決定使用DIF Radix2/sup 2//2 FFT演算法之Pipeline架構來設計2048點FFT。最後並以Mat lab撰寫DVB-T基頻接收機之2048點快速傅立葉轉換器且模擬驗證其結果。 In this paper, we introduce DVB-T systematic structure and specification, then probe into the advantage and disadvantage of Memory base and Pipeline base two kinds of structure. In order to design conveniently, we decide to design 2048 FFT with DIF Pipeline structure by Radix2/sup 2//2 algorithm. Finally, we simulate 2048 FFT of DVB-T receiver base band on Mat lab, and verify its result.
