此篇論文使用不同以往於數位TA的架構，提出一個類比式的時間放大器架構，在0.18um製程下實現精確並可調整的放大倍率。將此TA架構應用於Coarse-Fine TDC中，將大大提升電路的解析度。 With the improvement of technology, electronic products are miniaturized and are getting faster. Operating speed of transistors is getting faster and faster, with the problem, the operating voltage of the transistor is getting low. Low operating voltage results in difficulty of processing signals with high resolution in voltage domain, especially for analog circuits. On the contrary, transistors featured high speed can process signals with high resolution in time domain.
In recent years, TDCs used for detecting time interval of specific events are widely applied in many fields such like all digital PLL, chip’s jitter, single molecule fluorescence spectroscopy, fluorescence imaging and laser scanning microscopy. In high speed situation, there have some very important issues about clock measurements; the data transmission and reception and the noise interference problems.
This paper proposes an analog-implemented TA architecture which is different from the past works used a digital architecture of TA to achieve a large and precise time difference amplifying. With applied in a coarse-fine TDC, resolution of the TDC can be greatly enhanced.