English  |  正體中文  |  简体中文  |  Items with full text/Total items : 51296/86402 (59%)
Visitors : 8164080      Online Users : 48
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library & TKU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
  • Adv. Search
    HomeLoginUploadHelpAboutAdminister Goto mobile version
    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/87455


    Title: 加速應力允收試驗之最佳化設計
    Other Titles: Optimal design for accelerated-stress acceptance test
    Authors: 林琮庭;Ling, Cong-Ting
    Contributors: 淡江大學數學學系碩士班
    蔡志群;Tsai, Chih-Chun
    Keywords: 最佳應力允收時間;品質特徵值;最佳試驗配置;Accelerated-stress acceptance time;quality characteristics;optimal test plan
    Date: 2013
    Issue Date: 2013-04-13 11:08:29 (UTC+8)
    Abstract: 隨著產品市場競爭激烈,如何縮短產品允收時間以加速出貨速
    度,即為製造商所面臨到的重要決策問題。解決此問題,可選取一
    與產品可靠度有關的品質特徵值 (quality characteristic,QC),
    且此品質特徵值隨時間逐漸衰變,再藉由提高環境應力,以加速產品的衰變,進而縮短產品的允收時間,此即所謂的加速應力允收試驗 (accelerated-stress acceptance test)。
    本文首先以一組晶片電阻器衰變資料為動機例子,建構一衰變模型。接下來,提高環境應力,探討如何執行一最佳加速應力允收試驗。換言之,在試驗總成本不超過事先給定的預算下,極小化最佳應力允收時間估計值之近似變異數,以求得最佳試驗配置 (optimal test plan)。 最後,本文以 39k ohm 晶片電阻器為例,求其最佳應力允收時間,以及在給定成本函數下的最佳試驗配置,並進行敏感度分析及模擬分析。
    Due to the intense market competition, the manufacturers face the important decision issue about how to shorten product acceptance time to speed up the shipment. In such cases, this accelerated test can be solved if there exist
    quality characteristics whose degradation over time can be related to reliability, then collecting degradation data. By elevating the environmental stress to accelerate the decay of the products, then acceptance testing time of the products can be shortened. This is called an accelerated-stress acceptance test. In this paper, motivated by a resistor data, we deal with the optimal design for a accelerated-stress acceptance test. In other words, under the constraint that the total experimental cost does not exceed a predetermined budget, the optimal decision variables are obtained by minimizing the approximate variance of the estimated optimal accelerated-stress acceptance testing time. Finally, the chip resistors on
    39k ohm is presented to illustrate the proposed method.
    Appears in Collections:[數學學系暨研究所] 學位論文

    Files in This Item:

    File SizeFormat
    index.html0KbHTML76View/Open

    All items in 機構典藏 are protected by copyright, with all rights reserved.


    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library & TKU Library IR teams. Copyright ©   - Feedback