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    顯示項目61-70 / 4393. (共440頁)
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    日期題名作者
    1998-11-24 A 2-dimensional DCT/IDCT with overlapped row-column operation 江正雄; Chiang, Jen-shiun;
    2005-03 A 2.5V 6.4mW 10-bit 140MS/s Digital-to-Analog Converterwith Improved Current Mirror 郭建宏; Kuo, Chien-hung;
    2015-10 A 25 MHz crystal less clock generator with background calibration against process and temperature variation Yang, Wei-Bin; Hong, Ming-Hao
    2010-02 A 250 MHz 14 dB-NF 73 dB-Gain 82 dB-DR Analog Baseband Chain with Digital-Assisted DC-Offset Calibration for Ultra-Wideband 施鴻源; Shih, Horng-yuan;
    1998-05-31 A 3.3 V all digital phase-locked loop with small DCO hardware and fast phase lock 江正雄; Chiang, Jen-shiun;
    1998-11-24 A 3.3 V two-stage fourth-order sigma-delta modulator with gain compensation technique 江正雄; Chiang, Jen-shiun;
    1998 A 3.3V delta-sigma A/D converter with area-efficient and low-power digital filter for decimation on speech coding 江正雄; Chiang, Jen-shiun;
    A 3D Endoscopic Imaging System with Content-Adaptive Filtering and Hierarchical Similarity Analysis Chih-Hsien Hsia; Jen-Shiun Chiang;
    2006-11 A 91dB SOP-Based Low-Voltage Low-Distortion Fourth-Order 2-2 CascadedDelta-Sigma Modulator 郭建宏; Kuo, Chien-hung;
    2001-10 A bandwidth allocation/sharing/ extension protocol for multimedia over IEEE 802.11 Ad Hoc wireless LANs Sheu, Shiann-tsong; Sheu, Tzu-fang

    顯示項目61-70 / 4393. (共440頁)
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