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    顯示項目51-75 / 5128. (共206頁)
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    日期題名作者
    2012-02-02 68.4 µW 400 MHz intrabody communication receiver front-end for biomedical applications Shih, Horng-Yuan; Chang, Yu-Chuan
    2005 70MHz band-pass Gm-C filter with automatic frequency tuning 陳建輔; Chen, Chien-fu
    2007-08-07 80-S/s delta sigma modulators for IR thermometer Chiang, Jen-shiun; Chen, Hsin-liang;
    2007 802.11n傳輸干擾測試與分析 王靖銘; Wang, Jing-ming
    2004 94年度「通訊科技人才培育先導型計畫」 楊淳良
    2004 94年度「通訊科技人才培育先導型計畫」─光通訊系統教學推動中心(光電子學) 楊淳良
    2004 94會計年度「超大型積體電路與系統設計人才培育先導型計畫─課程推廣計畫」 江正雄
    2009 98年度「高科技專利取得與攻防課程推廣計畫」─高科技專利取得與攻防 李揚漢
    2004-11 A 1-V 10.7-MHz fourth-order bandpass ΔΣ modulators using two switched op amps 郭建宏; Kuo, Chien-hung;
    2001-09 A 1.2 V 500 MHz 32-bit carry-lookahead adder 鄭國興; Cheng, Kuo-hsing;
    1996-10-13 A 1.2 V CMOS multiplier using low-power current-sensing complementary pass-transistor logic 鄭國興; Cheng, Kuo-hsing;
    1997-12-15 A 1.2 V low-power TSPC complementary pass transistor logic 鄭國興; Cheng, Kuo-hsing;
    1997-08-21 A 1.2V 32-bit CMOS adder design using convertional 5V CMOS process 鄭國興; Cheng, Kuo-hsing;
    2005-06-14 A 10-bit 2.5 mW 0.27 mm2 CMOS DAC with spike-free switching 郭建宏; Kuo, Chien-hung;
    2005 A 10-bit 50Msample/s pipelined analog-to-digital converter 黃世麟; Huang, Shih-lin
    2005 A 10bits low power digital-to-analog converter 蔡仁杰; Tsai, Jen-chieh
    2006-08 A 1V 82dB Multibit Delta-Sigma Modulator Kuo, Chien-Hung; Chang, Kang-Shuo;
    2003-08 A 1V, 11-Bits Double-Sampling Delta-Sigma Modulator 郭建宏; Kuo, Chien-hung;
    1998-11-24 A 2-dimensional DCT/IDCT with overlapped row-column operation 江正雄; Chiang, Jen-shiun;
    2005-03 A 2.5V 6.4mW 10-bit 140MS/s Digital-to-Analog Converterwith Improved Current Mirror 郭建宏; Kuo, Chien-hung;
    2016-05-01 A 25 MHz crystal less clock generator with background calibration against process and temperature variation Yang, Wei-Bin; Hong, Ming-Hao
    2010-02 A 250 MHz 14 dB-NF 73 dB-Gain 82 dB-DR Analog Baseband Chain with Digital-Assisted DC-Offset Calibration for Ultra-Wideband 施鴻源; Shih, Horng-yuan;
    2015-05-22 A 25MHz Crystal Less Clock Generator with Background Calibration Against Process and Temperature Variation Yang, Wei-Bin
    1998-05-31 A 3.3 V all digital phase-locked loop with small DCO hardware and fast phase lock 江正雄; Chiang, Jen-shiun;
    1998-11-24 A 3.3 V two-stage fourth-order sigma-delta modulator with gain compensation technique 江正雄; Chiang, Jen-shiun;

    顯示項目51-75 / 5128. (共206頁)
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