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    題名: Test Slice Difference Technique for Low-Transition Test Data Compression
    作者: Rau, Jiann-Chyi;Wu, Po-Han;Li, Wei-Lin
    貢獻者: 淡江大學電機工程學系
    關鍵詞: Test Data Compression;Low Power Testing;VLSI;Design for Testability (DFT)
    日期: 2012-06
    上傳時間: 2013-03-11 16:00:16 (UTC+8)
    出版者: Taipei: Tamkang University
    摘要: This paper presents a low power strategy for test data compression and a new decompression
    scheme for test vectors. In our method, we propose an efficient algorithm for scan chain reordering to deal with the power dissipation problem. Further, we also propose a test slice difference (TSD) technique to improve test data compression. It is an efficient method and only needs one extra scan cell. In experimental results, the scheme that we presented achieve high compression ratio. The power consumption is also better compared with other well-known compression techniques.
    關聯: Journal of Applied Science and Engineering 15(2), pp.157-166
    DOI: 10.6180/jase.2012.15.2.09
    顯示於類別:[電機工程學系暨研究所] 期刊論文

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