淡江大學機構典藏:Item 987654321/81317
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    題名: Implemented LDO Chip with Output Capacitors Free
    作者: Tseng, Hsien-Wei;Lee, Yang-Han;Huang, Chao-Chung;Yen, Liang-Yu;Jan, Yih-Guang
    貢獻者: 淡江大學電機工程學系
    關鍵詞: LDO;Linear Regulator;DC-DC Converter;Linear Regulator;DC-DC Converter
    日期: 2013-01-01
    上傳時間: 2013-03-09 23:55:08 (UTC+8)
    出版者: Scientific.Net
    摘要: In this paper the process of implementing a low dropout regulator (LDO) chip is presented; it is using uses Taiwan Semiconductor TSMC’s Manufacture Inc. 0.35um 2P4M process. The circuit designed with the described process can be is operated at 3-5V input voltage to generate 2.5V output voltage. Maximum output current can be running up to 200mA. This LDO is implemented without
    placing output capacitors to reduce BOM (Bill of Material) cost and stable between 0~200mA loading
    current and the chip is stable when the loading current is in the range 0~200mA. [8] The new
    proposed LDO chip can be implemented in the handheld mobile devices, battery powered equipment,wireless devices, cordless phones, or PC peripherals.
    關聯: Applied Mechanics and Materials 284-287, pp.2521-2525
    顯示於類別:[電機工程學系暨研究所] 期刊論文

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    AMM.284-287.2521.pdf655KbAdobe PDF1253檢視/開啟

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