English  |  正體中文  |  简体中文  |  Items with full text/Total items : 49287/83828 (59%)
Visitors : 7150057      Online Users : 52
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library & TKU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
  • Adv. Search
    HomeLoginUploadHelpAboutAdminister Goto mobile version
    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/80317


    Title: Ant Colony Optimization algorithm design and its FPGA implementation
    Authors: Li, S.A.;Yang, M.H.;Weng, C.W.;Chen, Y.H.;Lo, C.H.;Wu, C.E.;Wong, C.C.
    Contributors: 淡江大學電機工程學系
    Keywords: Ant Colony Algorithm;FPGA;Hardware/Software Codesign;SOPC
    Date: 2012-11
    Issue Date: 2013-01-21 22:06:00 (UTC+8)
    Publisher: Institute of Electrical and Electronics Engineers (IEEE)
    Abstract: In this paper, a Hardware/Software (HW/SW) co-design method of ant colony optimization (ACO) algorithm is proposed to implement on the FPGA chip. In this paper, the software is designed with C language and hardware is designed with Verilog hardware description language (HDL). The HW/SW co-design method is a technique based on a SOPC (System on a Programmable Chip). In this paper, the path selecting and path analysis are designed in SOPC. The path selecting belongs to the pre-processing of the ACO algorithm and it cost a longer computing processing time. Therefore, a hardware circuit is designed to speed up processing. The path analysis will be designed by the C language within the NIOS II processor. In the experimental results, the processing time can be reduced by the proposed method.
    Relation: Intelligent Signal Processing and Communications Systems (ISPACS), 2012 International Symposium on, pp.262-265
    DOI: 10.1109/ISPACS.2012.6473492
    Appears in Collections:[電機工程學系暨研究所] 會議論文

    Files in This Item:

    File Description SizeFormat
    Ant Colony Optimization algorithm design and its FPGA implementation.pdf全文438KbAdobe PDF162View/Open
    index.html0KbHTML110View/Open

    All items in 機構典藏 are protected by copyright, with all rights reserved.


    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library & TKU Library IR teams. Copyright ©   - Feedback