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    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/7695


    Title: 無進位式高速除法器之演算法則與硬體架構之研究與發展
    Other Titles: The Research and Development of the Algorithm and Hardware Architecture of a High Speed Divider
    Authors: 江正雄
    Contributors: 淡江大學電機工程學系
    Keywords: 除法器;部分餘數;無進位;有號數;Divider;Partial remainder;Carry free;Signed digit
    Date: 1999
    Issue Date: 2009-03-16 16:32:21 (UTC+8)
    Appears in Collections:[電機工程學系暨研究所] 研究報告

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