次微微秒解析度之時間數位轉換器電路研製

機構典藏 > College of Engineering > Graduate Institute & Department of Electrical Engineering > Research Paper > Item 987654321/76917

Please use this identifier to cite or link to this item: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/76917

Title:	次微微秒解析度之時間數位轉換器電路研製
Other Titles:	Design of a Time-To-Digital Converter with Resolution of Sub-Pico Second
Authors:	施鴻源
Contributors:	淡江大學電機工程學系
Keywords:	time-to-digital converter;TDC;all-digital phase-locked loop;ADPLL;analog-to-digital converter;ADC
Date:	2011-08
Issue Date:	2012-05-22 21:53:54 (UTC+8)
Abstract:	隨著半導體製程之進步，電晶體的操作速度越來越快。相反的，電晶體的操作電壓卻越來越低，使得以往在電壓域(Voltage Domain)設計電路變得越來越困難。尤其是在類比數位轉換器的設計上，要達到高解析度變得十分困難。反之，由於電晶體的操作速度越來越快，因此在時間域(Time domain)上處理訊號可達到的解析度越來越高。因此運用時間數位轉換器處理訊號可達具有高解析度、省電、快速等優點。本計畫目的在於發展一解析度小於1ps 之時間數位轉換器，可廣泛應用於類比數位轉換器、全數位鎖相迴路(ADPLL)的設計上。並具有縮小晶片面積、省電等優點。 Advanced semiconductor process leads transistors featured high speed and low operating voltage. Low operating voltage results in difficulty of high resolution in voltage domain, especially for design of analog-to-digital converters (ADCs). On the contrary, Transistors featured high speed lead to high resolution in time domain. Therefore, the purpose of this project is to develop a time-to-digital converter (TDC) with resolution of sub-pico second applying in analog-to-digital converters (ADCs) and all-digital phase-locked loop (ADPLL). The time-to-digital converter also features low power and small chip area.
Appears in Collections:	[Graduate Institute & Department of Electrical Engineering] Research Paper

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