Application of Hardware Architecture of Genetic Algorithm for Optimal Packet Scheduling

機構典藏 > College of Engineering > Graduate Institute & Department of Electrical Engineering > Proceeding > Item 987654321/76743

Please use this identifier to cite or link to this item: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/76743

Title:	Application of Hardware Architecture of Genetic Algorithm for Optimal Packet Scheduling
Authors:	Wu, Rong-Hou;Lee, Yang-Han;Sheu, Shiann-Tsong;Tseng, Hsien-Wei
Contributors:	淡江大學電機工程學系
Keywords:	Genetic algorithm;Dense wavelength;Division multiplexing;Packet scheduling
Date:	2006-10
Issue Date:	2012-05-16 16:59:26 (UTC+8)
Abstract:	In Dense Wavelength Division Multiplexing (DWDM) technologies, the optimal packet scheduling is a common encounter issue in multiple channels network. NP-hard problem deals with finding a way to rearrange packets in multiple channels into a finite and rare channel. Genetic algorithm (GA) is one of the most efficient ways to solve this issue. We hope to find a better solution to our task through the GA characteristics of multiprocessor searching and survivor of the fittest. Therefore, a modified and achievable hardware architecture of GA is presented in this paper. This architecture can increase the schedule speed of packet scheduling also can promote the efficiency of DWDM in Optical Communication Networks.
Relation:	Proceedings of 9th Joint Conference on Information Sciences，4頁
Appears in Collections:	[Graduate Institute & Department of Electrical Engineering] Proceeding

Files in This Item:

File	Description	Size	Format
Application of Hardware Architecture of Genetic Algorithm for Optimal Packet Scheduling_西文摘要.docx	摘要	13Kb	Microsoft Word	146	View/Open