淡江大學機構典藏:Item 987654321/75311

淡江大學機構典藏

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    Please use this identifier to cite or link to this item: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/75311


    Title: The High-Performance and Low-Power CMOS Output Driver Design
    Authors: Cheng, Ching-tsan;Wang, Chi-hsiung;Liao, Pei-hsuan;Yang, Wei-bin;Lo, Yu-lung
    Contributors: 淡江大學電機工程學系
    Keywords: CMOS buffer;Bootstrapped driver;low-power driver;feedback-controlled
    Date: 2011
    Issue Date: 2012-03-19 16:16:28 (UTC+8)
    Publisher: Dordrecht: Springer Netherlands
    Abstract: There are many important points for high-speed CMOS integrated circuit, such as switching speed, power dissipation and full-swing of voltage. In this paper, a group of high performance and low-power bootstrapped CMOS drivers are designed in order to reduce power consumption and enhance the speed of switch for driving a large load, where the drivers will reduce the power consumption by using bootstrap manipulate conditional to input statistics. Moreover, the low swing bootstrapped feedback controlled split path (LBFS) is conducted to reduce the dynamic power dissipation and limiting the voltage swing of gate of the output stage. Finally, the charge transfer feedback controlled split path (CRFS) CMOS buffer is used to restitute and pull down the gate voltage for reducing power consumption and line noise. According to the HSPICE simulation results, the proposed drivers of the CMOS driver are reduced by 20%~40 compared to the conventional design.
    Relation: Lecture Notes in Electrical Engineering 98, pp.917-925
    DOI: 10.1007/978-3-642-21765-4_114
    Appears in Collections:[Graduate Institute & Department of Electrical Engineering] Journal Article

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