The new dynamic fast settling low dropout regulator (LDO) is presented for minimizing setting time in voltage switched by utilizing the multi-voltage control technique and dynamic fastsettling mechanism. The proposed LDO provides multiple discrete voltage levels of output by using multi-voltage control technique. Meanwhile, the settling time is reduced by utilizing dynamic fastsettling mechanism during output voltage switched. Furthermore, we propose the new comparator architecture to avoid the problems of overcharging and over-discharging at feedback node Vfb and output node Vout .The simulation results are based on 0.35μm CMOS process. The transient time of the proposed LDO is reduced from 4.2ms to 22μs. Moreover, the power dissipation of the multivoltage control and dynamic fast-settling mechanism is only 0.3mW in a heavy load condition.
