English  |  正體中文  |  简体中文  |  全文笔数/总笔数 : 49064/83170 (59%)
造访人次 : 6963378      在线人数 : 46
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library & TKU Library IR team.
搜寻范围 查询小技巧:
  • 您可在西文检索词汇前后加上"双引号",以获取较精准的检索结果
  • 若欲以作者姓名搜寻,建议至进阶搜寻限定作者字段,可获得较完整数据
  • 进阶搜寻

    jsp.display-item.identifier=請使用永久網址來引用或連結此文件: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/75220

    题名: 2.5-GHz hybrid oscillator with both a wide tuning range and high frequency resolution for digital PLL
    作者: 施鴻源;Chiu, Huan-ke;Chueh, Tzu-chan;Chen, Chiou-bang
    贡献者: 淡江大學電機工程學系
    关键词: ADPLL
    Oscillator;frequency synthesizer;varactor;phase noise;tuning range
    日期: 2011-04-15
    上传时间: 2012-03-14 11:26:35 (UTC+8)
    出版者: IEEE
    摘要: A hybrid oscillator for WiMAX application is presented with comprehensive study. The hybrid oscillator is part of a digital fractional-N frequency synthesizer realized in a 0.13-um CMOS process. By operating the DAC followed by oscillator, the requirement of finest switched capacitor value and high-speed dithering of ǻӢ data converter are relaxed. A time-domain simulation approach for modeling the phase noise introduced by the frequency discretization was taken. The proposed approach is well suited to investigate complex interactions in the sophisticated system, which cannot be studied by using conventional RF and analog simulation tools. The prototype core chip consumes 8.6 mA from a 1.4-V supply while providing a phase noise of -120.35 dBc/Hz at 1 MHz offset from 2.808 GHz carrier and a 570 MHz frequency tuning range (23%).
    關聯: 2011 International Conference on Electric Information and Control Engineering (ICEICE), Wuhan, China, pp952-955
    DOI: 10.1109/ICEICE.2011.5777624
    显示于类别:[電機工程學系暨研究所] 會議論文


    档案 描述 大小格式浏览次数
    05777624.pdf290KbAdobe PDF370检视/开启



    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library & TKU Library IR teams. Copyright ©   - 回馈