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    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/70572

    Title: The AB-Filling Methodology for Power-aware At-Speed Scan Testing
    Authors: Chen, Tsung-tang;Wu, Po-han;Chen, Kung-han;Rau, Jiann-chyi;Tzeng, Shih-ming
    Contributors: 淡江大學電機工程學系
    Date: 2010-10-31
    Issue Date: 2011-10-23 21:27:15 (UTC+8)
    Publisher: IEEE Computer Society Test Technology Thchnical Council; IEEE Philadelpjia Section
    Abstract: ATPG-based technique for reducing shift and capture power during scan testing is presented without any influence on fault coverage. This paper presents Adjacent Backtracing filling (AB-fillingl) which both adjacent and backtracing filling algorithms are used, is integrated in the ATPG algorithm to reduce capture power while feeding the first test pattern into CUT. After our approach for at-speed scan testing, all of test patterns have assigned as partially-specified values with a small number of don't care value (x) bits as in test compression, and it is a low capture power and considering the shift power test pattern. Experimental results for ISCAS'89 benchmark circuits show that the proposed scheme outperforms previous method in capture power.
    Relation: Proceedings of 2010 IEEE International Test Conference (ITC), poster #7(1 pages)
    DOI: 10.1109/TEST.2010.5699299
    Appears in Collections:[電機工程學系暨研究所] 會議論文

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