Los Alamitos, California：Institute of Electrical and Electronics Engineers (IEEE)
Focusing on the way-predicting cache with sub-block placement, we propose a new cache scheme that uses the valid bits from data memory to pre-decide disabling the unnecessary tag-subarrays and data-subarrays. By validbit pre-decision, it significantly helps in improving the average energy saving of the conventional waypredicting cache without valid-bit pre-decision, especially for with large associativity and small subblock size. Moreover, the proposed way-predicting cache can be applied to the parallel architecture systems to reduce the overall power consumption.
Advanced Information Networking and Applications, 2005. AINA 2005. 19th International Conference on, vol.2, pp.203-206