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    題名: Implement Synchronous Multiple I/O with Ethernet Controller for 8051 Micro-processor Based on Avalon Bus
    作者: Wu, Chiou-hung;Kuo, Kai-hua;Li, Shih-an
    貢獻者: 淡江大學電機工程學系
    日期: 2010-07
    上傳時間: 2011-10-23 21:18:34 (UTC+8)
    出版者: CSCIST 2010
    摘要: In recent years, micro-processors have been applied to embedded systems and portable devices widely. Most embedded systems do not require very powerful capability of process which means that it only needs higher adaptive, expansive and transplantable systems. Under above demands, 8051 micro-processor sets have been put in use on many applicative devices. However, finite I/O ports in 8051 micro-processor truly put restrictions on its network applications. Our topic in this paper is mainly improving the lack of I/O ports in 8051 micro-processor and developing the applications to Ethernet network. We design two different kinds of circuits called “RAMx Interface Circuit” and “Ethernet Interface Circuit” to help combine several systems. Further, modifying the internal architecture of 8051 micro-processor with multiple I/O controllers is another important implement in our research. To connect to Ethernet network through 8051 micro-processor, we join 8051 micro-processor with multiple I/O controllers to Ethernet Interface Circuit, and our system enable us to control Ethernet controller through memory- mapping I/O. Finally, we materialize RAMx Interface Circuit and Ethernet Interface Circuit on FPGA board.
    關聯: 2010海峽兩岸資訊科學與資訊技術學術交流研討會,
    顯示於類別:[電機工程學系暨研究所] 會議論文

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