CMOS oversampling ΔΣ magnetic to digital converters

淡江大學機構典藏 > 工學院 > 電機工程學系暨研究所 > 會議論文 > Item 987654321/70341

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題名:	CMOS oversampling ΔΣ magnetic to digital converters
作者:	Ho, Lee-an;Chen, Shr-lung;Kuo, Chien-hung;Liu, Shen-iuan
貢獻者:	淡江大學電機工程學系
日期:	2001-05
上傳時間:	2011-10-23 21:11:38 (UTC+8)
出版者:	IEEE
摘要:	In this paper, two CMOS oversampling delta-sigma (ΔΣ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) ΔΣ modulator. The second one directly uses the MOP to realize a first-order SC ΔΣ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively.
關聯:	The 2001 IEEE International Symposium on Circuits and Systems,pp.1582 - 1586
DOI:	10.1109/4.953488
顯示於類別:	[電機工程學系暨研究所] 會議論文

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