Analysis and Design of High Performance, Low Power Multiple Ports

淡江大學機構典藏 > 工學院 > 電機工程學系暨研究所 > 會議論文 > Item 987654321/70319

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题名:	Analysis and Design of High Performance, Low Power Multiple Ports
作者:	Jau, Ting-sheng;Yang, Wei-bin;Chang, Chung-yu
贡献者:	淡江大學電機工程學系
关键词:	DSP;RISC processor;differential-End structure;register file;single-End structure
日期:	2006-12
上传时间:	2011-10-23 21:10:09 (UTC+8)
出版者:	IEEE
摘要:	This paper talks about how to analyze and design high performance low power multiple-ports register file circuitry, which is mostly used on mu-P and DSP chip. Firstly, in this paper, we discuss basic concept of register files. Secondly we introduce the different types of register file architecture. Then we analyze and compare design trade-offs among those approaches. With that, we decide the suitable register file circuitry for our application. Then, we start to analyze the low power design style for each block. Finally, we achieve design goal of low power and high performance register file circuit compare to some other designs. It is fabricated by TSMC 0.13mum 1p8m 1.2v process. Simulation result shows the design has the fine 0.013 mW/MHz-port
關聯:	2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), pp.1453 - 1456
DOI:	10.1109/APCCAS.2006.342495
显示于类别:	[電機工程學系暨研究所] 會議論文

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