Faulty-Tolerant Algorithm for Mapping a Complete Binary Tree in an IEH

機構典藏 > College of Global Entrepreneurial Development > Department of Innovative Information and Technology > Journal Article > Item 987654321/64012

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Title:	Faulty-Tolerant Algorithm for Mapping a Complete Binary Tree in an IEH
Authors:	Wu, Shih-Jung;Jen-Chih Lin;Huan-Chao Keh
Contributors:	淡江大學資訊創新與科技學系
Keywords:	Hypercube;Incrementally Extensible Hypercube;Complete binary tree;Fault-Tolerance;Embedding
Date:	2008-03
Issue Date:	2011-10-20 11:16:14 (UTC+8)
Publisher:	Zographou: World Scientific and Engineering Academy and Society
Abstract:	Different parallel architectures may require different algorithms to make the existent algorithms on one architecture be easily transformed to or implemented on another architecture. This paper proposes a novel algorithm for embedding complete binary trees in a faulty Incrementally Extensible Hypercube (IEH). Furthermore, to obtain the replaceable node of the faulty node, 2-expansion is permitted such that up to (n+1) faults can be tolerated with dilation 3, congestion 1 and load 1. The presented embedding methods are optimized mainly for balancing the processor loads, while minimizing dilation and congestion as far as possible. According to the result, we can map the parallel algorithms developed by the structure of complete binary tree in an IEH. These methods of reconfiguring enable extremely high-speed parallel computation.
Relation:	WSEAS Transactions on Computers 7(3), p.83-88
Appears in Collections:	[Graduate Institute & Department of Computer Science and Information Engineering] Journal Article [Department of Innovative Information and Technology] Journal Article

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