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    請使用永久網址來引用或連結此文件: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/60942

    題名: An Efficient Scheduling Algorithm Based On Multi-frequency TAM for SOC Testing
    作者: Rau, Jiann-chyi;Wu, Po-han;Ma, Jia-shing
    貢獻者: 淡江大學電機工程學系
    關鍵詞: SOC;Testing;TAM
    日期: 2008-06
    上傳時間: 2011-10-15 01:07:47 (UTC+8)
    出版者: Zographou: World Scientific and Engineering Academy and Society (W S E A S)
    摘要: In recent years the advance of CMOS technology has led to a great development, especially on the complexity of the system-on-chip (SOC). As the development of circuit with different technology, the embedded cores embedded into system-on-chips (SOCs) usually have multi-frequency to drive it. In this paper, we present a heuristic approach of TAM optimization according to the reality and reduce the test application time. The proposed method is applicable to the design model with hierarchy SOCs. We pay the price in hardware overhead in order to decrease test application time.
    關聯: WSEAS Transactions on Circuits And System 6(7), pp.558-568
    顯示於類別:[電機工程學系暨研究所] 期刊論文


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