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    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/60852


    Title: 低功率多輸出入埠暫存器檔案之分析與設計
    Other Titles: Analysis and Design of Low Power Register File with Multiple Input and Output Ports
    Authors: 楊維斌
    Contributors: 淡江大學電機工程學系
    Date: 2004-10
    Issue Date: 2011-10-15 00:59:02 (UTC+8)
    Publisher: 工業技術研究院系統晶片技術發展中心
    Abstract: 本篇文章主要是在探討如何分析與設計低功率多輸出入埠暫存器檔案,因為暫存器檔案常被使用在微處理器與數位訊號處理晶片上,因此,如何設計高效能的暫存器檔案電路是當務之急。本篇文章將從暫存器檔案的架構與電路型態做切入,分析各種不同電路架構之優劣,以決定適合之暫存器檔案電路架構。再由電路功率消耗分析著手,將暫存器檔案電路內部各個區塊電路,做功率消耗分析,找出最耗能的區塊電路,用低功率的電路設計技巧來完成高效能低功率之暫存器檔案電路。
    Relation: 系統晶片=SoC Technical Journal 1,頁123-129
    Appears in Collections:[Graduate Institute & Department of Electrical Engineering] Journal Article

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