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    題名: A Sub-1V Fourth-Order Bandpass Delta-Sigma Modulator
    作者: Chang, Hsiang-hui;Kuo, Chien-hung;Liu, Ming-huang;Liu, Shen-Iuan
    貢獻者: 淡江大學電機工程學系
    關鍵詞: Low-voltage;Switched-capacitor;Bandpass delta-sigma modulator;Two-path structure
    日期: 2003-12
    上傳時間: 2013-05-31 11:44:18 (UTC+8)
    出版者: Norwell: Kluwer Academic Publishers
    摘要: A sub-1V fourth-order bandpass delta-sigma modulator is presented in this paper. Using the switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without using voltage multipliers or bootstrapping switches. A two-path structure is applied to relax the settling requirement. Implemented in a 0.25-μm one-poly, five-metal standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 58.2 db and a dynamic range (DR) of 64 db in a 60 KHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm2.
    關聯: Analog Integrated Circuits and Signal Processing 37(3), pp.179-189
    DOI: 10.1023/A:1026265624740
    顯示於類別:[電機工程學系暨研究所] 期刊論文

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