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    Please use this identifier to cite or link to this item: http://tkuir.lib.tku.edu.tw:8080/dspace/handle/987654321/59928


    Title: Improving memory traffic by assembly-level exploitation of reuses for vector registers
    Authors: Chang, Chih-yung;Chen, T. S.;Sheu, J. P.
    Contributors: 淡江大學資訊工程學系
    Keywords: data dependence;vector register;partial reuse;vector compilers;reuse distance;vectorization;supercomputer
    Date: 2000-09-01
    Issue Date: 2011-10-05 22:27:50 (UTC+8)
    Abstract: In this paper, we propose a compilation scheme to analyze and exploit the implicit reuses of vector register data. According to the reuse analysis, we present a translation strategy that translates the vectorized loops into assembly vector codes with exploitation of vector reuses. Experimental results show that our compilation technique can improve the execution time and traffic between shared memory and vector registers. Techniques discussed here are simple, systematic, and easy to be implemented in the conventional vector compilers or translators to enhance the data locality of vector registers.
    Relation: The journal of supercomputing 17(2), pp.187-204
    DOI: 10.1023/A:1008134522009
    Appears in Collections:[資訊工程學系暨研究所] 期刊論文

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