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    題名: A 250 MHz 14 dB-NF 73 dB-Gain 82 dB-DR Analog Baseband Chain with Digital-Assisted DC-Offset Calibration for Ultra-Wideband
    作者: 施鴻源;Shih, Horng-yuan;Kuo, Chien-nan;Chen, Wei-hsien, Yang, Tzu-yi;Juang, Kai-chenug
    貢獻者: 淡江大學電機工程學系
    關鍵詞: Analog filter;DC offset calibration;Analog baseband;Current-mode VGA;Current-mode filter;Ultra wideband
    日期: 2010-02
    上傳時間: 2011-08-09 11:05:04 (UTC+8)
    出版者: IEEE Solid-State Circuits Society
    摘要: A 250 MHz analog baseband chain for ultra-wideband was implemented in a 1.2 V 0.13 ¿ m CMOS process. The chip has an active area of 0.8 mm2. In the analog baseband, PGAs and filters are carried out by current-mode amplifiers to achieve wide bandwidth and wide dynamic range of gain, as well as low noise and high linearity. Besides, a current-mode Sallen-Key low-pass filter is adopted for effective rejection of out-of-band interferers. A 6 th-order Chebyshev low-pass filter realized in Gm-C topology is designed in the baseband chain for channel selection. Digitally-assisted DC-offset calibration improves second-order distortion of the entire chain. The design achieves a maximum gain of 73 dB and a dynamic range of 82 dB. Measured noise figure is 14 dB, an IIP3 of -6 dBV, and IIP2 of -5 dBV at the maximum gain mode. The analog baseband chain consumes 56.4 mA under supply of 1.2 V.
    關聯: IEEE Journal of Solid-State Circuits 45(2), pp.338-350
    DOI: 10.1109/JSSC.2009.2036320
    顯示於類別:[電機工程學系暨研究所] 期刊論文

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