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    題名: Programmable fractional-N clock generators
    作者: 郭書菖;Kuo, Shu-chang;楊維斌;Yang, Wei-bin;鄭國興;Cheng, Kuo-Hsing
    貢獻者: 淡江大學電機工程學系
    日期: 2005-09-23
    上傳時間: 2011-05-20 15:38:05 (UTC+8)
    摘要: Clock generators capable of generating clocks with different frequency according to a binary code. A voltage controlled oscillation module generates a plurality of first clocks (D.sub.0.about.D.sub.m) with a first frequency (f0), in which the first clocks D.sub.i and D.sub.i-1 have a fixed phase difference and 1<i<m. A logic control circuit outputs a set of corresponding clocks arranged in a corresponding sequence according to the first clocks and a binary code. A clock synthesizer generates a second clock with a second frequency (f1) according to the set of corresponding clocks, in which f1=A/B f0, A<B and A and B are positive integers.
    顯示於類別:[電機工程學系暨研究所] 專利

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