An Efficient VLSI Architecture for Rivest-Shamir-Adleman Public-key Cryptosystem

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題名:	An Efficient VLSI Architecture for Rivest-Shamir-Adleman Public-key Cryptosystem
作者:	江正雄;Chiang, Jen-shiun;簡丞志;Chien, Cheng-chih;Chen, Jian-kao;周信國;Chou, Hsin-guo
貢獻者:	淡江大學電機工程學系
關鍵詞:	Data Security;H-algorithm;L-algorithm;Modular Exponentiation;Modular Multiplication;Montgomery's Algorithm;Public-key Cryptosystem;RSA;VLSI
日期:	2004-12-01
上傳時間:	2010-12-01 10:35:56 (UTC+8)
出版者:	臺北縣：淡江大學
摘要:	In this paper, a new efficient VLSI architecture to compute modular exponentiation and modular multiplication for Rivest-Shamir-Adleman (RSA) public-key cryptosystem is proposed. We modify the conventional H-algorithm to find the modular exponentiation. By this modified H-algorithm, the modular multiplication steps for n-bit numbers are reduced by 5n/18 times. For the modular multiplication a modified L-algorithm (LSB first) is used. In the architecture of the modified modular multiplication the iteration times are only half of Montgomery's algorithm and the H-algorithm. The proposed architecture for the RSA public-key crypto-system has a data rate of 146 kb/s for 512-b words with a 200-MHz clock rate.
關聯:	淡江理工學刊=Tamkang journal of science and engineering 7(4)，頁241-250
DOI:	10.6180/jase.2004.7.4.07
顯示於類別:	[電機工程學系暨研究所] 期刊論文

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