淡江大學機構典藏:Item 987654321/52811
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    Please use this identifier to cite or link to this item: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/52811


    Title: Inductorless CMOS Receiver Front-End Circuits for 10-Gb/s Optical Communications
    Authors: Chen, Hsin-Liang； Chen, Chih-Hao； Yang, Wei-Bin； Chiang, Jen-Shiun
    Contributors: 淡江大學電機工程學系
    Keywords: Transimpedance Amplifier;Limiting Amplifier;Inducorless;Optical Communication
    Date: 2009-12-01
    Issue Date: 2010-12-01 10:34:20 (UTC+8)
    Publisher: 臺北縣：淡江大學
    Abstract: In this paper, a 10-Gb/s inductorless CMOS receiver front end is presented, including a transimpedance amplifier and a limiting amplifier. The transimpedance amplifier incorporates Regulated Cascode (RGC), active-inductor peaking, and intersecting active feedback circuits to achieve a transimpedance gain of 56 dB and a bandwidth of 8.27 GHz with a power dissipation of 35 mW. The limiting amplifier employs interleaving active feedback to achieve a differential voltage gain of 44.5 dB and a bandwidth of 10.3 GHz while consuming 226 mW. Both circuits are realized in 0.18- m CMOS technology with a 1.8-V supply.
    Relation: 淡江理工學刊=Tamkang Journal of Science and Engineering 12(4), pp.449-458
    DOI: 10.6180/jase.2009.12.4.09
    Appears in Collections:[Graduate Institute & Department of Electrical Engineering] Journal Article

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