IEEE 802.11a/b/g/n多模雙頻低成本射頻前端模組(FEM)的設計與實現

淡江大學機構典藏 > 工學院 > 電機工程學系暨研究所 > 學位論文 > Item 987654321/52532

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題名:	IEEE 802.11a/b/g/n多模雙頻低成本射頻前端模組(FEM)的設計與實現
其他題名:	Low cost design and realize of multi mode and dual band RF frond-end module for IEEE 802.11a/b/g/n
作者:	章華順;Chang, Hua-shun
貢獻者:	淡江大學電機工程學系碩士在職專班李慶烈;Li, Ching-lieh
關鍵詞:	射頻模組;RF;RF IC;module
日期:	2010
上傳時間:	2010-09-23 17:52:58 (UTC+8)
摘要:	本論文利用Sip(System-In-Package)的封裝方式設計一多模雙頻射頻前端低成本模組(FEM)，其目標在達成縮小化的目且符合射頻性能的要求，以因應目前攜帶移動式產品的發展趨勢。從PCMCIA至Mini PCI，再至PCI-e的介面演進過程，使其在電路板面積有嚴苛的限制，但其效能要求並不因此而降低，故模組化的設計變成了最主要的解決/整合模式。 IEEE 802.11n下的多通道輸出、多通道輸入(MIMO)的系統架構，已成現階段大量佔用電路板面積的最主要因素，經由射頻前端模組化（FEM）的設計概念就可解決此一問題。本論文設計的前端射頻模組，其最終體積為6x5x1.4mm³，工作頻段為ISM Bands 2GHz/5GHz，模組內包含了低雜訊放大器、功率放大器、射頻切換器、匹配電路以及濾波器等射頻前端元件及電路。本研究的Sip封裝之射頻模組流程，可以大大減少設計開發時間以及開發成本，且其開發門檻上比一般全積體電路式的開發門檻要小很多。本論文利用圖表以及流程圖來詳細描述以Sip封裝進行的射頻前端模組設計。 In this thesis, Sip (System-In-Package) packaging is employed to design a low-cost multi-mode dual-band RF front-end module (FEM), to reach its goal of size-reducing and meet the RF performance requirements, in response to the trends of the current mobile products. For the evolution of the PC interface, from the specification of PCMCIA to Mini PCI, then to PCI-e, its performance does not require any less, though the circuit board area is of strict limit, for which the modular design is an important and consolidation solution. In facts, the multi-channel output and the multi-channel input (MIMO) system architecture of IEEE 802.11n has become the most important factor of occupying a large circuit board area, which can be resolved through the design concept of RF front-end module (FEM). The achieved volume of the front-end RF module implemented in this thesis is about 6x5x1.4mm³. In addition, the working frequency range includes ISM 2GHz/5GHz bands. The module contains RF front-end components and circuitry such as the low noise amplifier, power amplifier, RF switch, RF matching circuits and filters, etc. The Sip packaging process for the RF module, studied is this thesis, can greatly reduce the time and costs for the design and development. Furthermore, the thresholds of its design/development are much smaller than those based on the full integrated circuit type. In this thesis, charts and flow charts are utilized to describe the details of the design of RF front-end module based the Sip packaging process.
顯示於類別:	[電機工程學系暨研究所] 學位論文

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