淡江大學機構典藏:Item 987654321/52525
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    Please use this identifier to cite or link to this item: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/52525


    Title: 以軟硬體協同設計之粒子濾波器及其在影像追蹤之應用
    Other Titles: Hardware/software co-design for particle filter and its applications in object tracking
    Authors: 王瑞斌;Wang, Jui-pin
    Contributors: 淡江大學電機工程學系碩士班
    許陳鑑;Hsu, Chen-chien
    Keywords: 粒子濾波器;軟硬體協同設計;FPGA;SoPC;影像追蹤;Particle Filter;HW/SW co-design;FPGA;SOPC;Object Tracking
    Date: 2010
    Issue Date: 2010-09-23 17:52:42 (UTC+8)
    Abstract: 本文是提出一可程式規劃系統晶片(System On Program Chip, SOPC) 之系統架構，針對粒子濾波器演算法，利用FPGA(Field Programming Gate Array)的硬體電路優勢，以軟硬體協同設計(HW/SW co-design)之方式實現硬體加速之功能，提升之演算法執行效率。藉由軟硬體緊密的合作，可以加快執行速度，也由於有彈性的設計方式，使得在解決各種問題時不需要重新設計硬體。最後，本文將以該軟硬體協同設計方式實現之粒子濾波器，配合多主從系統架構設計一物體影像即時追蹤系統，以驗證系統之性能表現。
    This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the execution performance of particle filter (PF) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating particles and a weight evaluation module implemented on a soft-cored processor for calculating weighting for each particle are respectively designed and work closely together to accelerate the execution process. Thanks to a flexible design, the proposed approach can tackle various problems of embedded applications without the need for hardware redesign. Experiment results have demonstrated that the proposed HW/SW co-deign approach to realize particle filters has good computational efficiency to achieve a high-quality solution effectively. Finally, we realize the proposed particle filter with multi-master system architecture design to establish an image processing system for real-time object tracking
    Appears in Collections:[Graduate Institute & Department of Electrical Engineering] Thesis

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