具資料維持之低靜態功耗暫存器檔案

淡江大學機構典藏 > 工學院 > 電機工程學系暨研究所 > 研究報告 > Item 987654321/47090

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題名:	具資料維持之低靜態功耗暫存器檔案
其他題名:	A Register File with Low Static Power Dissipation and Data Holding
作者:	楊維斌
貢獻者:	淡江大學電機工程學系
關鍵詞:	數位信號處理單元;低漏電流;快速回復;資料維持;高速低功率暫存器檔案;電源閘控制電路;DSP;low leakage current;low wake-up time;data holding;high-speed low-power register file;power gating
日期:	2009
上傳時間:	2010-04-15 16:15:31 (UTC+8)
摘要:	在現今的可攜式電子產品中，為了提供多媒體的需求，都必須整合數位信號處理單元於系統晶片中，以提高系統晶片處理多媒體的效能。暫存器檔案是微處理器的基本元件，扮演著相當重要的角色。一個卓越的微處理器需要一個好的暫存器檔案，以達到平行及高速處理的功能。再者，為了延長電池使用的時間與壽命，如何使暫存器檔案能兼具高效能與低功耗的特性，是本研究計畫最主要的目的。因此，本計畫主要是研發適用於高效能數位信號處理單元中之，低漏電流、快速回復與資料維持之高速低功率暫存器檔案。為了達到此目的，本計畫預計開發二個新電路，一是新型電源閘控制電路、二是具資料維持之暫存器儲存單元。在新型電源閘控制電路方面，除了能降低電源閘導通時所產生的瞬間大電流外，更能減少系統回復時間，加快系統運作速度。而在具資料維持之率暫存器儲存單元部份，最主要是在增加少量硬體之下，能達到資料與狀態維持的目的。不靠外部儲存元件儲存資料，節省產品生產成本與降低資料回寫時的功率消耗。最後結合兩電路，使暫存器檔案能達到低漏電流、快速回復與資料維持的特性，使其能應用於先進之微處理器與數位訊號處理晶片上。 Recently, in order to provide multimedia processing capability in portable devices, the DSP is integrated into a chip to enhance system performance. Register file is the basic device, playing an important role, in the DSPs. In order to accomplish the goal of high-speed processing, the high performance DSP needs an excellent register file. Moreover, in order to extend the battery life time, we propose the high performance and low power dissipation register file in this proposal. The high-speed low-power register file with the characteristics of low leakage current, low wake-up time and data holding can be realized for high performance DSPs. Consequently, two new circuits need to be developed. One is new power gating controlled circuit, and the other one is new storage cell of register file with data holding during sleep mode. The new power gating controlled circuit can reduce instantaneous current during sleep transistors switching from off to on and the system wake-up time can be reduced. In the proposed architecture, the data and status information are stored in the register file instead of storing in the external memory. This approach can save the hardware cost of the external memory and further reduce the data writing back access power. By integrating these two circuits, the high-speed low-power register file with low leakage current, low wake-up time and data holding characteristics be realized and is used in advance μ-controller and DSP.
顯示於類別:	[電機工程學系暨研究所] 研究報告

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