World Scientific and Engineering Academy and Society (WSEAS)
摘要:
During built-in self-test (BIST), the set of patterns generated by a pseudo-random patterns generator may not provide a sufficiently high fault coverage and many patterns was undetected fault so some patterns not make test time can decrease. In this paper, we reseed and modify the pseudo-random bit to improve test length and achieve fault coverage of 100%. The fact that a random test set contains useless (non fault dropping) patterns, so we use parallel technology, including both reseeding and bit modifying (also called pattern mapping) to remove useless patterns (i.e. reduce the test time), leading to very short test length. The technique we present is applicable for single-stuck-at faults. Experimental results indicate that complete fault coverage-100% can be obtained with decrease test time.
關聯:
WSEAS Transactions on Circuits and System 3(3), pp.723-726
