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    題名: A pairwise substitutional fault tolerance technique for the cube-connected cycles architecture
    作者: Tzeng, Nian-feng;莊博任;Chuang, Po-jen
    貢獻者: 淡江大學電機工程學系
    日期: 1994-04
    上傳時間: 2010-03-26 21:34:40 (UTC+8)
    出版者: Piscataway: Institute of Electrical and Electronics Engineers (IEEE)
    摘要: With all of the salient features of hypercubes, the cube-connected cycles (CCC) structure is an attractive parallel computation network suited for very large scale integration (VLSI) implementation because of its layout regularity. Unfortunately, the classical CCC structure tends to suffer from considerable performance degradation in the presence of faults. The authors deal with a fault-tolerant CCC structure obtained by incorporating a spare PE in each cycle and by adding extra links among PE's to realize dimensional substitutes for failed PE's in the immediate lower dimension. A unique feature of this design lies in that a faulty PE and its laterally connected PE are always replaced at the same time by their immediate vertical successor pair, achieving pairwise substitution to elegantly maintain the rigid full CCC structure after faulty PE's arise. The proposed structure improves reliability substantially without incurring large overhead in layout area. This design is compared with earlier fault-tolerant CCC designs in terms of normalized reliability, which takes area overhead into account. An extension to this fault-tolerant structure is also discussed
    關聯: IEEE Transactions on Parallel and Distributed Systems 5(4), pp.433-438
    DOI: 10.1109/71.273049
    顯示於類別:[電機工程學系暨研究所] 期刊論文

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