Creating disjoint paths in gamma interconnection networks

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題名:	Creating disjoint paths in gamma interconnection networks
作者:	Tzeng, Nian-feng;莊博任;Chuang, Po-jen;Wu, Chwan-hwa
貢獻者:	淡江大學電機工程學系
日期:	1993-10
上傳時間:	2010-03-26 21:16:07 (UTC+8)
出版者:	Piscataway: Institute of Electrical and Electronics Engineers (IEEE)
摘要:	The Gamma interconnection network (GIN) is composed of 3×3 basic building blocks, with interconnecting patterns between stages following the plus-minus-2i functions. The authors consider modifications to the GIN by altering the interconnecting patterns between stages so as to achieve high terminal reliability between any source-destination pair, resulting in the reliable GIN (REGIN). A type of REGIN's ensures totally disjoint paths in existence from any source to any destination, thereby capable of tolerating an arbitrary single fault. If several building blocks (i.e., 3×3 switches) are fabricated in one chip with very large scale integrated (VLSI) technology, the layout area and the pin count are less for the REGIN than for its GIN counterpart as a result of the change in the interconnecting patterns, giving rise to potential cost reduction. The terminal reliability of the REGIN is derived and compared with that of a compatible GIN. In addition, the performance of the REGIN is evaluated using simulation
關聯:	IEEE transactions on computers 42(10), pp.1247-1252
DOI:	10.1109/12.257710
顯示於類別:	[電機工程學系暨研究所] 期刊論文

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