Stevenage:Institution of Engineering and Technology (IET)
A high resolution magnetic-ﬁeld-to-digital converter (MDC) is presented. It is composed of a magnetic-ﬁeld-to-pulse width converter (MPC), a cyclic pulse-shrinking time-to-digital converter (TDC) and a polarity detector. This prototype circuit has been fabricated in a 0.5μm CMOS DPDM process. With a clock rate of 16.6 kHz, the power consumption is 42.5 mW under 5 V supply voltage. The equivalent resolution less than 16μT can be achieved within the range of 710 mT. After off-line calibration, the remaining offset is 0.017 mT and its gain error is smaller than 0.4%.
IEE Proceedings-Circuits, Devices and Systems 153(3), pp.247-252