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| 題名: | True-single-phase all-N-logic differential logic (TADL) for very high-speed complex VLSI |
| 作者: | Huang, Hong-yi;鄭國興;Cheng, Kuo-hsing;Chu, Yuan-hua;Wu, Chung-yu |
| 貢獻者: | 淡江大學電機工程學系 |
| 日期: | 1996-05 |
| 上傳時間: | 2010-04-15 11:00:23 (UTC+8) |
| 出版者: | Institute of Electrical and Electronics Engineers (IEEE) |
| 摘要: | A family of new logic circuits, called true-single-phase all-N-logic differential logic (TADL), are proposed and analyzed. The logic circuits are designed with only NMOS devices in the logic tree. Two kinds of sensing techniques are used for improving the speed operation, namely, the balanced sense amplifier for the differential-input TADL and the unbalanced sense amplifier for the single-input TADL. A complex function can be implemented in a TADL gate and high operation speed can be achieved without dc power dissipation. Only a true-single-phase clock is required to form the fully pipelined systems. Simulation results show that circuits designed by the TADL have the advantages of high-speed operation and low power-delay product. |
| 關聯: | Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on (Volume:4 ), pp.296-299 |
| DOI: | 10.1109/ISCAS.1996.541960 |
| 顯示於類別: | [電機工程學系暨研究所] 會議論文
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