Institute of Electrical and Electronics Engineers (IEEE)
For high speed and low jitter PLL application, a new phase frequency detector (PFD) with difference detector is proposed. Because the proposed difference detector PFD (dd-PFD) doesn't have any feedback path in phase frequency detector circuit, it can be operated up to 1.6 GHz. Furthermore, with difference detector, the dd-PFD has three states, so it will not have phase errors and jitter problems. The dead zone of dd-PFD is 16 ps. The proposed PFD is designed using 0.35 μm CMOS technology at 3.3 V power supply.
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on (Volume:1 ), pp.43-46