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    題名: The novel efficient design of XOR/XNOR function for adder applications
    作者: Cheng, Kuo-hsing;Huang, Chih-sheng
    貢獻者: 淡江大學電機工程學系
    日期: 1999-09-05
    上傳時間: 2010-04-15 11:43:27 (UTC+8)
    出版者: N.Y.: Institute of Electrical and Electronic Engineers (IEEE)
    摘要: A new concept to implement high performance XOR/XNOR functions that using the pass transistor technique is proposed. It requires only six MOS transistors. Base upon this concept, a new high-speed full adder is proposed for low-power application. We used the modified Karnaugh map (K-map) method to obtain the various pass transistor circuits. We modified the Boolean expression to simplify the control and input signals of the pass transistor logic (PTL) to realize a one-bit full adder. The analysis of the proposed one-bit adders is compared with that of the static CMOS adder, the CPL transmission function adder, the DPL transmission gate adder, and the CPL transmission gate adder. The simulation results shows that the proposed new circuit has the lowest power delay product performance
    關聯: Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on (Volume:1 ), pp.29-32
    DOI: 10.1109/ICECS.1999.812216
    顯示於類別:[電機工程學系暨研究所] 會議論文


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