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    Please use this identifier to cite or link to this item: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/38841


    Title: High efficient 3-input XOR for low-voltage low-power high-speed applications
    Authors: Cheng, Kuo-hsing;Hsieh, Ven-chieh
    Contributors: 淡江大學電機工程學系
    Date: 1999
    Issue Date: 2010-04-15 11:44:07 (UTC+8)
    Publisher: Institute of Electrical and Electronics Engineers (IEEE)
    Abstract: A new 3-input XOR gate based upon the pass transistor design methodology for low-voltage, low-voltage high-speed applications is proposed. Five existing circuits are compared with the new proposed gate. It is shown that the proposed new circuit has at least 50% improvement in power-delay product than that of the CPL structure and the CMOS structure. Moreover, the proposed new circuit can also be operated as low as 1 V. Thus, the proposed new circuit is suitable for low-power, low-voltage and high-speed applications.
    Relation: ASICs, 1999. AP-ASIC '99. The First IEEE Asia Pacific Conference on, pp.166-169
    DOI: 10.1109/APASIC.1999.824054
    Appears in Collections:[Graduate Institute & Department of Electrical Engineering] Proceeding

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