A Novel Loop Filter Design for Phase-Locked Loops

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題名:	A Novel Loop Filter Design for Phase-Locked Loops
作者:	周永山;Chou, Yung-shan;Mao, W. L.;Chen, Y. C.;Chang, F. R.
貢獻者:	淡江大學電機工程學系
日期:	2006-10-08
上傳時間:	2010-04-15 11:08:41 (UTC+8)
出版者:	Institute of Electrical and Electronics Engineers (IEEE)
摘要:	A new loop filter design method for phase locked loops (PLLs) is presented, which employs multi-objective control technique to deal with the various design objectives: small noise bandwidth, good transient response (small settling time, small overshoot), and large gain and phase margins. Trade-off among the conflicting objectives is made via recently developed convex optimization skill in conjunction with appropriate adjustment of certain design parameters. One salient feature of the proposed method is that it allows one to specify the filter poles in advance, including the special case of PI form filter. Moreover, the proposed method is applicable to PLL of any order. Numerical simulation on nonlinear PLL model is performed which demonstrates the effectiveness of the proposed method.
關聯:	Systems, Man and Cybernetics, 2006. SMC '06. IEEE International Conference on (Volume:4 ), pp.2932-2938
DOI:	10.1109/ICSMC.2006.384563
顯示於類別:	[電機工程學系暨研究所] 會議論文

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