Low Power High Speed Low Noise Mobile Phone Receiver Phase IC Design

機構典藏 > College of Engineering > Graduate Institute & Department of Electrical Engineering > Proceeding > Item 987654321/38580

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Title:	Low Power High Speed Low Noise Mobile Phone Receiver Phase IC Design
Authors:	Cheng, Eddie;Ye, Fun
Contributors:	淡江大學電機工程學系
Keywords:	Low power;High speed;Low noise;Receiver;Phase detector;XOR phasedetector;Loop filter;Current starved voltage controlled oscillator
Date:	2005-10
Issue Date:	2010-01-11 15:31:52 (UTC+8)
Abstract:	As mobile phones' designing cycles are becoming shorter and shorter: from 6-8 months to 4-6 months nowadays, mobile phones' designers are competing who can layout a lower power-consumption, higher data throughput rate, and lower noising rate cellular phones than others. As a matter of fact, the receiver's phases IC is the key of all requirements. This article offer readers every key component's circuits and related mathematic formulas. In addition, it gives many useful tips. Therefore, readers can make a better performance circuit. Moreover, it comes out beneficial ways from semiconductor industrial experiences so that readers can achieve low-power consumption circuit. However, this text gives engineers a very valuable guideline to design a mobile phone's receiver phase IC.
Relation:	第十二屆國際神經資訊處理會議論文集=Proceedings of 12th International Conference on Neural Information Proceeding，頁192-196
Appears in Collections:	[Graduate Institute & Department of Electrical Engineering] Proceeding

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