A novel asynchronous control unit and the application to a pipelined multiplier

淡江大學機構典藏 > 工學院 > 電機工程學系暨研究所 > 會議論文 > Item 987654321/38564

jsp.display-item.identifier=請使用永久網址來引用或連結此文件: https://tkuir.lib.tku.edu.tw/dspace/handle/987654321/38564

题名:	A novel asynchronous control unit and the application to a pipelined multiplier
作者:	江正雄;Chiang, Jen-shiun;Liao, Jun-yao
贡献者:	淡江大學電機工程學系
日期:	1998-05-31
上传时间:	2010-04-15 10:50:54 (UTC+8)
出版者:	Institute of Electrical and Electronics Engineers (IEEE)
摘要:	This paper discusses the technique for asynchronous circuit design using a novel asynchronous control unit. We employ the very commonly used device, pass-transistor multiplexer, to design and implement the asynchronous control unit. Even though the architecture of the control unit is simple, the efficiency is good. A multiplier with pipelined structure has been designed to verify the usefulness of this technique. We use TSMC's 0.6 μm SPDM process to design and implement an 8-b×8-b pipelined multiplier. The HSPICE simulation shows that the feedthrough rate of the inputs can be as high as 250 MHz.
關聯:	Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on (Volume:2 ), pp.169-172
DOI:	10.1109/ISCAS.1998.706868
显示于类别:	[電機工程學系暨研究所] 會議論文

文件中的档案:

档案	描述	大小	格式	浏览次数
0780344553_2p169-172.pdf		432Kb	Adobe PDF	530	检视/开启
index.html		0Kb	HTML	219	检视/开启

在機構典藏中所有的数据项都受到原著作权保护.

TAIR相关文章